1 citations · 1 across the 8 of their papers we have counts for
8 papers
HWE-Bench: Benchmarking LLM Agents on Real-World Hardware Bug Repair Tasks
Fan Cui, Hongyuan Hou, Zizhang Luo +2
Existing benchmarks for hardware design primarily evaluate Large Language Models (LLMs) on isolated, component-level tasks such as generating HDL modules from specifications, leavi…
LLM-Guided Strategy Synthesis for Scalable Equality Saturation
Chenyun Yin, Youwei Xiao, Yuze Luo +2
Equality saturation (EqSat) is a powerful optimization paradigm that compactly represents many equivalent programs in an e-graph and delays commitment until extraction selects a lo…
Hive: A Multi-Agent Infrastructure for Algorithm- and Task-Level Scaling
Zizhang Luo, Yuhao Luo, Youwei Xiao +3
Large language models are increasingly deployed as complex agentic systems that scale with task complexity. While prior work has extensively explored model- and system-level scalin…
Clover: A Neural-Symbolic Agentic Harness with Stochastic Tree-of-Thoughts for Verified RTL Repair
Zizhang Luo, Yansong Xu, Runlin Guo +6
RTL program repair remains a critical bottleneck in hardware design and verification. Traditional automatic program repair (APR) methods rely on predefined templates and synthesis,…
Efficient Solving for Dynamic Data Structure Constraint Satisfaction Problem
Nanbing Li, Weijie Peng, Jin Luo +4
Functional verification plays a central role in ensuring the correctness of modern integrated circuit designs, where constrained-random verification is widely adopted to generate d…
SkyEgg: Heterogeneity-Aware Hardware Synthesis via Equality Saturation
Youwei Xiao, Yuyang Zou, Yun Liang +1
Hardware synthesis is a key interface between high-level programs and accelerator designs. Modern FPGAs increasingly expose heterogeneity in resource functionality and timing confi…
Cement2: Temporal Hardware Transactions for High-Level and Efficient FPGA Programming
Youwei Xiao, Zizhang Luo, Weijie Peng +2
Hardware design faces a fundamental challenge: raising abstraction to improve productivity while maintaining control over low-level details like cycle accuracy. Traditional RTL des…
Aquas: Enhancing Domain Specialization through Holistic Hardware-Software Co-Optimization based on MLIR
Yuyang Zou, Youwei Xiao, Chenyun Yin +6
Application-Specific Instruction-Set Processors (ASIPs) built on the RISC-V architecture offer specialization opportunities for various applications. Existing frameworks are largel…