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20242026
most citedHiVeGen -- Hierarchical LLM-based Verilog Generation for Scalable Chip Design

1 citations · 1 across the 5 of their papers we have counts for

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cs.DC2026

SparseDitto: An Agentic Sparse Compilation Framework through Architecture-Aware Synthesis on GPUs

Shiyang Li, Guangyan Sun, Jinwei Tang +3

Sparse matrix computation performance on GPU depends on how representation and execution schedule match the input structure and target hardware. No single implementation consistent…

cs.AR2026

Bridging the Last Mile of Circuit Design: PostEDA-Bench, a Hierarchical Benchmark for PPA Convergence and DRC Fixing

Pengju Liu, Nuo Xu, Jinwei Tang +2

LLM-based agents are increasingly applied to the "last mile" of Electronic Design Automation (EDA): repairing residual sign-off Design Rule Check (DRC) violations and converging Po…