1 citations · 3 across the 14 of their papers we have counts for
14 papers
FinHardBench: Can LLMs Generate Latency-Aware Hardware for Financial Computing?
Weimin Fu, Hejia Zhang, Minghao Shao +6
Can large language models generate not just correct, but fast hardware? This paper investigates the question in financial FPGA design, where 5-10 nanoseconds of latency determines…
Focus Session: Hardware and Software Techniques for Accelerating Multimodal Foundation Models
Muhammad Shafique, Abdul Basit, Muhammad Abdullah Hanif +3
This work presents a multi-layered methodology for efficiently accelerating multimodal foundation models (MFMs). It combines hardware and software co-design of transformer blocks w…
Configuration Over Selection: Hyperparameter Sensitivity Exceeds Model Differences in Open-Source LLMs for RTL Generation
Minghao Shao, Zeng Wang, Weimin Fu +5
Benchmarking of open-source LLMs for hardware design focuses on which LLMs to use, while treating inference-time decoding configuration as a secondary concern. This work shows that…
From Natural Language to Silicon: The Representation Bottleneck in LLM Hardware Design
Weimin Fu, Zeng Wang, Minghao Shao +5
Edge applications increasingly demand custom hardware, yet Field-Programmable Gate Array (FPGA) design requires expertise that domain engineers lack. Large Language Models (LLMs) p…
HarmChip: Evaluating Hardware Security Centric LLM Safety via Jailbreak Benchmarking
Zeng Wang, Minghao Shao, Weimin Fu +6
The integration of large language models (LLMs) into electronic design automation (EDA) workflows has introduced powerful capabilities for RTL generation, verification, and design…
RAVEN: Retrieval-Augmented Vulnerability Exploration Network for Memory Corruption Analysis in User Code and Binary Programs
Parteek Jamwal, Minghao Shao, Boyuan Chen +15
Large Language Models (LLMs) have demonstrated remarkable capabilities across various cybersecurity tasks, including vulnerability classification, detection, and patching. However,…
Robustness Evaluation of Hybrid Quantum Neural Networks under Noise Models via System-Level Error Mitigation
Jesse Roberta Mingue Njiki, Nouhaila Innan, Alberto Marchisio +3
Quantum Neural Networks (QNNs) represent a promising direction within Quantum Machine Learning (QML), yet their realization on noisy intermediate-scale quantum (NISQ) devices remai…
Synthesis-in-the-Loop Evaluation of LLMs for RTL Generation: Quality, Reliability, and Failure Modes
Weimin Fu, Zeng Wang, Minghao Shao +5
RTL generation is more than code synthesis. Designs must be syntactically valid, synthesizable, correct, hardware-efficient. SOTA evaluations stop at functional correctness and do…
TrojanGYM: A Detector-in-the-Loop LLM for Adaptive RTL Hardware Trojan Insertion
Saideep Sreekumar, Zeng Wang, Akashdeep Saha +6
Hardware Trojans (HTs) remain a critical threat because learning-based detectors often overfit to narrow trigger/payload patterns and small, stylized benchmarks. We introduce Troja…
TrojanLoC: LLM-based Framework for RTL Trojan Localization
Weihua Xiao, Zeng Wang, Minghao Shao +6
Hardware Trojans (HT s) are a persistent threat to integrated circuits, especially when inserted at the register-transfer level (RTL). Existing methods typically first convert the…
NetDeTox: Adversarial and Efficient Evasion of Hardware-Security GNNs via RL-LLM Orchestration
Zeng Wang, Minghao Shao, Akashdeep Saha +4
Graph neural networks (GNNs) have shown promise in hardware security by learning structural motifs from netlist graphs. However, this reliance on motifs makes GNNs vulnerable to ad…
VeriDispatcher: Multi-Model Dispatching through Pre-Inference Difficulty Prediction for RTL Generation Optimization
Zeng Wang, Weihua Xiao, Minghao Shao +4
Large Language Models (LLMs) show strong performance in RTL generation, but different models excel on different tasks because of architecture and training differences. Prior work m…
SALAD: Systematic Assessment of Machine Unlearning on LLM-Aided Hardware Design
Zeng Wang, Minghao Shao, Rupesh Karn +6
Large Language Models (LLMs) offer transformative capabilities for hardware design automation, particularly in Verilog code generation. However, they also pose significant data sec…
VeriContaminated: Assessing LLM-Driven Verilog Coding for Data Contamination
Zeng Wang, Minghao Shao, Jitendra Bhandari +5
Large Language Models (LLMs) have revolutionized code generation, achieving exceptional results on various established benchmarking frameworks. However, concerns about data contami…