4 papers · 1 filter
Towards LLM-based Root Cause Analysis of Hardware Design Failures
Siyu Qiu, Muzhi Wang, Raheel Afsharmazayejani +3
With advances in large language models (LLMs), new opportunities have emerged to develop tools that support the digital hardware design process. In this work, we explore how LLMs c…
Large Language Models and Attention-Based AI for Hardware Design and Security: Progress, Challenges, and Opportunities
Sujan Ghimire, Parsa Mirfasihi, Muhtasim Alam Chowdhury +9
Recent advances in attention-based artificial intelligence (AI) models have unlocked vast potential to automate digital hardware design while enhancing and strengthening security m…
LASHED: LLMs And Static Hardware Analysis for Early Detection of RTL Bugs
Baleegh Ahmad, Hammond Pearce, Ramesh Karri +1
While static analysis is useful in detecting early-stage hardware security bugs, its efficacy is limited because it requires information to form checks and is often unable to expla…
Automatically Improving LLM-based Verilog Generation using EDA Tool Feedback
Jason Blocklove, Shailja Thakur, Benjamin Tan +3
Traditionally, digital hardware designs are written in the Verilog hardware description language (HDL) and debugged manually by engineers. This can be time-consuming and error-pron…