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cs.AR2024

Evaluating LLMs for Hardware Design and Test

Jason Blocklove, Siddharth Garg, Ramesh Karri +1

Large Language Models (LLMs) have demonstrated capabilities for producing code in Hardware Description Languages (HDLs). However, most of the focus remains on their abilities to wr…

cs.CR2024

OffRAMPS: An FPGA-based Intermediary for Analysis and Modification of Additive Manufacturing Control Systems

Jason Blocklove, Md Raz, Prithwish Basu Roy +4

Cybersecurity threats in Additive Manufacturing (AM) are an increasing concern as AM adoption continues to grow. AM is now being used for parts in the aerospace, transportation, an…

cs.AR2024

LLM-aided explanations of EDA synthesis errors

Siyu Qiu, Benjamin Tan, Hammond Pearce

Training new engineers in digital design is a challenge, particularly when it comes to teaching the complex electronic design automation (EDA) tooling used in this domain. Learners…

cs.CR2024

(Security) Assertions by Large Language Models

Rahul Kande, Hammond Pearce, Benjamin Tan +4

The security of computer systems typically relies on a hardware root of trust. As vulnerabilities in hardware can have severe implications on a system, there is a need for techniqu…

cs.PL2024

AutoChip: Automating HDL Generation Using LLM Feedback

Shailja Thakur, Jason Blocklove, Hammond Pearce +3

Traditionally, designs are written in Verilog hardware description language (HDL) and debugged by hardware engineers. While this approach is effective, it is time-consuming and err…

cs.CR2024

REMaQE: Reverse Engineering Math Equations from Executables

Meet Udeshi, Prashanth Krishnamurthy, Hammond Pearce +2

Cybersecurity attacks on embedded devices for industrial control systems and cyber-physical systems may cause catastrophic physical damage as well as economic loss. This could be a…