activity
20222026
most citedDatapath Combinational Equivalence Checking With Hybrid Sweeping Engines and Parallelization

9 citations · 10 across the 5 of their papers we have counts for

collaborators

5 papers

cs.LO2026

Rethinking Clause Management for CDCL SAT Solvers

Yalun Cai, Xindi Zhang, Zhengyuan Shi +2

Boolean Satisfiability (SAT) solving underpins a wide range of applications in Electronic Design Automation (EDA), particularly formal verification. However, this paper observes th…

cs.LO2025

FastLEC: Parallel Datapath Equivalence Checking with Hybrid Engines

Xindi Zhang, Furong Ye, Zhihan Chen +1

Combinational equivalence checking (CEC) remains a challenge EDA task in the formal verification of datapath circuits due to their complex arithmetic structures and the limited cap…

cs.DC2024★ 9 cited

Datapath Combinational Equivalence Checking With Hybrid Sweeping Engines and Parallelization

Zhihan Chen, Xindi Zhang, Yuhang Qian +1

In the application of IC design for microprocessors, there are often demands for optimizing the implementation of datapath circuits, on which various arithmetic operations are perf…

cs.LO2024

Revisiting Restarts of CDCL: Should the Search Information be Preserved?

Xindi Zhang, Zhihan Chen, Shaowei Cai

SAT solvers are indispensable in formal verification for hardware and software with many important applications. CDCL is the most widely used framework for modern SAT solvers, and…

cs.LO2022★ 1 cited

Local Search For Satisfiability Modulo Integer Arithmetic Theories

Shaowei Cai, Bohan Li, Xindi Zhang

Satisfiability Modulo Theories (SMT) refers to the problem of deciding the satisfiability of a formula with respect to certain background first order theories. In this paper, we fo…