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cs.CC2025
Bounded Dynamic Level Maintenance for Efficient Logic Optimization
Junfeng Liu, Qinghua Zhao, Liwei Ni +5
Logic optimization constitutes a critical phase within the Electronic Design Automation (EDA) flow, essential for achieving desired circuit power, performance, and area (PPA) targe…
cs.AR2025
BoolSkeleton: Boolean Network Skeletonization via Homogeneous Pattern Reduction
Liwei Ni, Jiaxi Zhang, Shenggen Zheng +5
Boolean equivalence allows Boolean networks with identical functionality to exhibit diverse graph structures. This gives more room for exploration in logic optimization, while also…