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cs.CC2025
Bounded Dynamic Level Maintenance for Efficient Logic Optimization
Junfeng Liu, Qinghua Zhao, Liwei Ni +5
Logic optimization constitutes a critical phase within the Electronic Design Automation (EDA) flow, essential for achieving desired circuit power, performance, and area (PPA) targe…
cs.CC2023
Rethinking NPN Classification from Face and Point Characteristics of Boolean Functions
Jiaxi Zhang, Shenggen Zheng, Liwei Ni +2
NPN classification is an essential problem in the design and verification of digital circuits. Most existing works explored variable symmetries and cofactor signatures to develop t…