45 citations · 46 across the 9 of their papers we have counts for
10 papers
Incremental Risk Assessment of Progressive Elder Financial Scams via Instruction-Tuned Small Language Models
Parviz Ghafariasl, Weimin Fu, Xiaolong Guo +1
Financial scams targeting older adults increasingly occur through text and voice channels such as email, SMS, and phone calls, unfolding over multiple conversational turns that beg…
FinHardBench: Can LLMs Generate Latency-Aware Hardware for Financial Computing?
Weimin Fu, Hejia Zhang, Minghao Shao +6
Can large language models generate not just correct, but fast hardware? This paper investigates the question in financial FPGA design, where 5-10 nanoseconds of latency determines…
Configuration Over Selection: Hyperparameter Sensitivity Exceeds Model Differences in Open-Source LLMs for RTL Generation
Minghao Shao, Zeng Wang, Weimin Fu +5
Benchmarking of open-source LLMs for hardware design focuses on which LLMs to use, while treating inference-time decoding configuration as a secondary concern. This work shows that…
From Natural Language to Silicon: The Representation Bottleneck in LLM Hardware Design
Weimin Fu, Zeng Wang, Minghao Shao +5
Edge applications increasingly demand custom hardware, yet Field-Programmable Gate Array (FPGA) design requires expertise that domain engineers lack. Large Language Models (LLMs) p…
HarmChip: Evaluating Hardware Security Centric LLM Safety via Jailbreak Benchmarking
Zeng Wang, Minghao Shao, Weimin Fu +6
The integration of large language models (LLMs) into electronic design automation (EDA) workflows has introduced powerful capabilities for RTL generation, verification, and design…
Synthesis-in-the-Loop Evaluation of LLMs for RTL Generation: Quality, Reliability, and Failure Modes
Weimin Fu, Zeng Wang, Minghao Shao +5
RTL generation is more than code synthesis. Designs must be syntactically valid, synthesizable, correct, hardware-efficient. SOTA evaluations stop at functional correctness and do…
AnalogSAGE: Self-evolving Analog Design Multi-Agents with Stratified Memory and Grounded Experience
Zining Wang, Jian Gao, Weimin Fu +2
Analog circuit design remains a knowledge- and experience-intensive process that relies heavily on human intuition for topology generation and device parameter tuning. Existing LLM…
LLM4SecHW: Leveraging Domain Specific Large Language Model for Hardware Debugging
Weimin Fu, Kaichen Yang, Raj Gautam Dutta +2
This paper presents LLM4SecHW, a novel framework for hardware debugging that leverages domain specific Large Language Model (LLM). Despite the success of LLMs in automating various…
Hardware Phi-1.5B: A Large Language Model Encodes Hardware Domain Specific Knowledge
Weimin Fu, Shijie Li, Yifang Zhao +6
In the rapidly evolving semiconductor industry, where research, design, verification, and manufacturing are intricately linked, the potential of Large Language Models to revolution…
VGF: Value-Guided Fuzzing -- Fuzzing Hardware as Hardware
Ruochen Dai, Michael Lee, Patrick Hoey +6
As the complexity of logic designs increase, new avenues for testing digital hardware becomes necessary. Fuzz Testing (fuzzing) has recently received attention as a potential candi…