21 citations · 40 across the 24 of their papers we have counts for
27 papers
LevelSyn: Physical-Aware Logic Synthesis via Level-Asynchronous Graph Neural Networks
Jingyi Zhou, Zhengyuan Shi, Ziyang Zheng +1
As integrated circuit technology scales into the nanometer regime, the traditional disconnect between logic synthesis and physical design has led to significant PPA (Power, Perform…
Beyond Flat Netlist: Hierarchical Graph Representation Learning for Scalable Analysis of Sequential Circuits
Jingyi Zhou, Zhengyuan Shi, Jiaying Zhu +2
Circuit Representation Learning (CRL) offers a powerful paradigm to guide and optimize core Electronic Design Automation (EDA) tasks, but its practical adoption is hindered by the…
HINT: Toward an Executable Hardware-Intent Representation Layer for LLM-Driven RTL Generation
Tairan Cheng, Yi Liu, Dongsheng Zuo +6
Generating implementation-quality RTL with large language models (LLMs) remains difficult because direct generation must resolve microarchitecture while simultaneously producing an…
Miter-Aware LUT Mapping: Aligning Structure and Solvability for Efficient Logic Equivalence Checking
Jiaying Zhu, Zhengyuan Shi, Mengxia Tao +3
Logic Equivalence Checking (LEC), a fundamental hardware verification task, is often bottlenecked by synthesis-induced structural perturbations and XOR-dense regions that degrade S…
Rethinking Clause Management for CDCL SAT Solvers
Yalun Cai, Xindi Zhang, Zhengyuan Shi +2
Boolean Satisfiability (SAT) solving underpins a wide range of applications in Electronic Design Automation (EDA), particularly formal verification. However, this paper observes th…
CktEvo: Repository-Level RTL Code Benchmark for Design Evolution
Zhengyuan Shi, Jingxin Wang, Tairan Cheng +3
Register-Transfer Level (RTL) coding is an iterative, repository-scale process in which Power, Performance, and Area (PPA) emerge from interactions across many files and the downst…
GNN-based Path-aware multi-view Circuit Learning for Technology Mapping
Wentao Jiang, Jingxin Wang, Zhang Hu +5
Traditional technology mapping suffers from systemic inaccuracies in delay estimation due to its reliance on abstract, technology-agnostic delay models that fail to capture the nua…
Alignment Unlocks Complementarity: A Framework for Multiview Circuit Representation Learning
Zhengyuan Shi, Jingxin Wang, Wentao Jiang +5
Multiview learning on Boolean circuits holds immense promise, as different graph-based representations offer complementary structural and semantic information. However, the vast st…
Circuit-Aware SAT Solving: Guiding CDCL via Conditional Probabilities
Jiaying Zhu, Ziyang Zheng, Zhengyuan Shi +2
Circuit Satisfiability (CSAT) plays a pivotal role in Electronic Design Automation. The standard workflow for solving CSAT problems converts circuits into Conjunctive Normal Form (…
AC-Refiner: Efficient Arithmetic Circuit Optimization Using Conditional Diffusion Models
Chenhao Xue, Kezhi Li, Jiaxing Zhang +7
Arithmetic circuits, such as adders and multipliers, are fundamental components of digital systems, directly impacting the performance, power efficiency, and area footprint. Howeve…
ForgeEDA: A Comprehensive Multimodal Dataset for Advancing EDA
Zhengyuan Shi, Zeju Li, Chengyu Ma +19
We introduce ForgeEDA, an open-source comprehensive circuit dataset across various categories. ForgeEDA includes diverse circuit representations such as Register Transfer Level (RT…
Functional Matching of Logic Subgraphs: Beyond Structural Isomorphism
Ziyang Zheng, Kezhi Li, Zhengyuan Shi +1
Subgraph matching in logic circuits is foundational for numerous Electronic Design Automation (EDA) applications, including datapath optimization, arithmetic verification, and hard…
DeepCircuitX: A Comprehensive Repository-Level Dataset for RTL Code Understanding, Generation, and PPA Analysis
Zeju Li, Changran Xu, Zhengyuan Shi +11
This paper introduces DeepCircuitX, a comprehensive repository-level dataset designed to advance RTL (Register Transfer Level) code understanding, generation, and power-performance…
DeepCell: Self-Supervised Multiview Fusion for Circuit Representation Learning
Zhengyuan Shi, Chengyu Ma, Ziyang Zheng +7
We introduce DeepCell, a novel circuit representation learning framework that effectively integrates multiview information from both And-Inverter Graphs (AIGs) and Post-Mapping (PM…
DeepGate4: Efficient and Effective Representation Learning for Circuit Design at Scale
Ziyang Zheng, Shan Huang, Jianyuan Zhong +4
Circuit representation learning has become pivotal in electronic design automation, enabling critical tasks such as testability analysis, logic reasoning, power estimation, and SAT…
DeepSeq2: Enhanced Sequential Circuit Learning with Disentangled Representations
Sadaf Khan, Zhengyuan Shi, Ziyang Zheng +2
Circuit representation learning is increasingly pivotal in Electronic Design Automation (EDA), serving various downstream tasks with enhanced model efficiency and accuracy. One not…
DeepGate3: Towards Scalable Circuit Representation Learning
Zhengyuan Shi, Ziyang Zheng, Sadaf Khan +3
Circuit representation learning has shown promising results in advancing the field of Electronic Design Automation (EDA). Existing models, such as DeepGate Family, primarily utiliz…
The Dawn of AI-Native EDA: Opportunities and Challenges of Large Circuit Models
Lei Chen, Yiqi Chen, Zhufei Chu +36
Within the Electronic Design Automation (EDA) domain, AI-driven solutions have emerged as formidable tools, yet they typically augment rather than redefine existing methodologies.…
Logic Optimization Meets SAT: A Novel Framework for Circuit-SAT Solving
Zhengyuan Shi, Tiebing Tang, Jiaying Zhu +5
The Circuit Satisfiability (CSAT) problem, a variant of the Boolean Satisfiability (SAT) problem, plays a critical role in integrated circuit design and verification. However, exis…
DeepGate2: Functionality-Aware Circuit Representation Learning
Zhengyuan Shi, Hongyang Pan, Sadaf Khan +7
Circuit representation learning aims to obtain neural representations of circuit elements and has emerged as a promising research direction that can be applied to various EDA and l…
Addressing Variable Dependency in GNN-based SAT Solving
Zhiyuan Yan, Min Li, Zhengyuan Shi +3
Boolean satisfiability problem (SAT) is fundamental to many applications. Existing works have used graph neural networks (GNNs) for (approximate) SAT solving. Typical GNN-based end…
DeepSeq: Deep Sequential Circuit Learning
Sadaf Khan, Zhengyuan Shi, Min Li +1
Circuit representation learning is a promising research direction in the electronic design automation (EDA) field. With sufficient data for pre-training, the learned general yet ef…
SATformer: Transformer-Based UNSAT Core Learning
Zhengyuan Shi, Min Li, Yi Liu +5
This paper introduces SATformer, a novel Transformer-based approach for the Boolean Satisfiability (SAT) problem. Rather than solving the problem directly, SATformer approaches the…
DeepTPI: Test Point Insertion with Deep Reinforcement Learning
Zhengyuan Shi, Min Li, Sadaf Khan +4
Test point insertion (TPI) is a widely used technique for testability enhancement, especially for logic built-in self-test (LBIST) due to its relatively low fault coverage. In this…