7 citations · 8 across the 7 of their papers we have counts for
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cs.LG2023
Combined Scheduling, Memory Allocation and Tensor Replacement for Minimizing Off-Chip Data Accesses of DNN Accelerators
Yi Li, Aarti Gupta, Sharad Malik
Specialized hardware accelerators have been extensively used for Deep Neural Networks (DNNs) to provide power/performance benefits. These accelerators contain specialized hardware…
cs.AR2023★ 7 cited
Security Verification of Low-Trust Architectures
Qinhan Tan, Yonathan Fisseha, Shibo Chen +4
Low-trust architectures work on, from the viewpoint of software, always-encrypted data, and significantly reduce the amount of hardware trust to a small software-free enclave compo…