4 citations · 7 across the 4 of their papers we have counts for
Showing cs.SEShow all
2 papers · 1 filter
cs.SE2024★ 4 cited
CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Design
Ruidi Qiu, Grace Li Zhang, Rolf Drechsler +2
Functional simulation is an essential step in digital hardware design. Recently, there has been a growing interest in leveraging Large Language Models (LLMs) for hardware testbench…
cs.SE2024★ 3 cited
AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design
Ruidi Qiu, Grace Li Zhang, Rolf Drechsler +2
In digital circuit design, testbenches constitute the cornerstone of simulation-based hardware verification. Traditional methodologies for testbench generation during simulation-ba…