activity
20242026
most citedExploration of Design Alternatives for Reducing Idle Time in Shor's Algorithm: A Study on Monolithic and Distributed Quantum Systems

1 citations · 2 across the 5 of their papers we have counts for

collaborators

5 papers

quant-ph2026

SAQC: A SAT-Aware Compilation Framework for QAOA-Based Quantum Optimization

Till Schnittka, Julie Maria Raju, Abhoy Kole +1

The Quantum Approximate Optimization Algorithm (QAOA) is a promising variational approach for solving Boolean satisfiability (SAT) problems. Existing SAT-to-QAOA workflows first tr…

cs.AR2026

TRACE: Traversal and Reasoning Algebraic Computing Engine for Formal Hardware Verification

Jan Kleinekathöfer, Lennart Weingarten, Kamalika Datta +1

Modern hardware verification of complex circuits relies heavily on the efficiency of formal methods. For complex arithmetic circuits in particular Symbolic Computer Algebra (SCA) e…

quant-ph2026

Measurement-Driven Adaptive Low-Overhead Implementation of Multi-Controlled Toffoli Gates

Abhoy Kole, Till Schnittka, Rolf Drechsler

The Toffoli gate is a fundamental building block for quantum arithmetic and reversible logic, yet its efficient realization remains a major challenge in both near-term and fault-to…

quant-ph2025★ 1 cited

Exploration of Design Alternatives for Reducing Idle Time in Shor's Algorithm: A Study on Monolithic and Distributed Quantum Systems

Moritz Schmidt, Abhoy Kole, Leon Wichette +3

Shor's algorithm is one of the most prominent quantum algorithms, yet finding efficient implementations remains an active research challenge. While many approaches focus on low-lev…

quant-ph2024★ 1 cited

qSAT: Design of an Efficient Quantum Satisfiability Solver for Hardware Equivalence Checking

Abhoy Kole, Mohammed E. Djeridane, Lennart Weingarten +2

The use of Boolean Satisfiability (SAT) solver for hardware verification incurs exponential run-time in several instances. In this work we have proposed an efficient quantum SAT (q…