1 citations · 3 across the 19 of their papers we have counts for
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Structure-augmented LLMs for High-Level Synthesis Pragma Optimization
Haocheng Xu, Ye Qiao, Phyo Pyae Moe Aung +7
Pragma insertion drives the quality of high-level synthesis (HLS) designs. Choosing the right directives demands expert knowledge and reasoning about loop nesting, data dependences…
EdgeDAE: Acceleration of Diffusion Action Experts for Real-Time Physical AI with Tiny VLAs on Edge FPGA-GPU Systems
Zhiheng Chen, Ye Qiao, Mohammad Abdullah Al Faruque +1
Physical AI models such as Vision-Language-Action (VLA) architectures enable generalist robotic policies through large-scale transformer backbones and diffusion-based action decode…
LowRank-SSM: Hardware-Software Co-Design for Rank-Reduced Mamba Acceleration on FPGA
Haocheng Xu, Bhardwaj Bhat, Yu-an Chou +6
State Space Models (SSMs) such as Mamba and Mamba-2 achieve linear-time autoregressive inference, making them attractive for latency-sensitive and resource-constrained deployment.…
PD-Swap: Prefill-Decode Logic Swapping for End-to-End LLM Inference on Edge FPGAs via Dynamic Partial Reconfiguration
Yifan Zhang, Zhiheng Chen, Ye Qiao +1
Aggressively quantized large language models (LLMs), such as BitNet-style 1.58-bit Transformers with ternary weights, make it feasible to deploy generative AI on low-power edge FPG…
TeLLMe v2: An Efficient End-to-End Ternary LLM Prefill and Decode Accelerator with Table-Lookup Matmul on Edge FPGAs
Ye Qiao, Zhiheng Chen, Yifan Zhang +2
With the emergence of wearable devices and other embedded systems, deploying large language models (LLMs) on edge platforms has become an urgent need. However, this is challenging…
A Sparsity-Aware Autonomous Path Planning Accelerator with HW/SW Co-Design and Multi-Level Dataflow Optimization
Yifan Zhang, Xiaoyu Niu, Hongzheng Tian +4
Path planning is critical for autonomous driving, generating smooth, collision-free, feasible paths based on perception and localization inputs. However, its computationally intens…
Characterizing State Space Model and Hybrid Language Model Performance with Long Context
Saptarshi Mitra, Rachid Karami, Haocheng Xu +2
Emerging applications such as AR are driving demands for machine intelligence capable of processing continuous and/or long-context inputs on local devices. However, currently domin…
COBRA: Algorithm-Architecture Co-optimized Binary Transformer Accelerator for Edge Inference
Ye Qiao, Zhiheng Chen, Yian Wang +3
Transformer-based models have demonstrated superior performance in various fields, including natural language processing and computer vision. However, their enormous model size and…
TeLLMe: An Energy-Efficient Ternary LLM Accelerator for Prefilling and Decoding on Edge FPGAs
Ye Qiao, Zhiheng Chen, Yifan Zhang +2
Deploying large language models (LLMs) on edge platforms is challenged by their high computational and memory demands. Although recent low-bit quantization methods (e.g., BitNet, D…
Optimized Spatial Architecture Mapping Flow for Transformer Accelerators
Haocheng Xu, Faraz Tahmasebi, Ye Qiao +3
Recent innovations in Transformer-based large language models have significantly advanced the field of general-purpose neural language understanding and generation. With billions o…
Optimizing High-Level Synthesis Designs with Retrieval-Augmented Large Language Models
Haocheng Xu, Haotian Hu, Sitao Huang
High-level synthesis (HLS) allows hardware designers to create hardware designs with high-level programming languages like C/C++/OpenCL, which greatly improves hardware design prod…