activity
20192023
most citedMind Mappings: Enabling Efficient Algorithm-Accelerator Mapping Space Search

97 citations · 121 across the 12 of their papers we have counts for

collaborators

12 papers

cs.CV2023

CARMA: Context-Aware Runtime Reconfiguration for Energy-Efficient Sensor Fusion

Yifan Zhang, Arnav Vaibhav Malawade, Xiaofang Zhang +4

Autonomous systems (AS) are systems that can adapt and change their behavior in response to unanticipated events and include systems such as aerial drones, autonomous vehicles, and…

cs.CR2023

Late Breaking Results: Scalable and Efficient Hyperdimensional Computing for Network Intrusion Detection

Junyao Wang, Hanning Chen, Mariam Issa +2

Cybersecurity has emerged as a critical challenge for the industry. With the large complexity of the security landscape, sophisticated and costly deep learning models often fail to…

cs.LG2023

DistHD: A Learner-Aware Dynamic Encoding Method for Hyperdimensional Classification

Junyao Wang, Sitao Huang, Mohsen Imani

Brain-inspired hyperdimensional computing (HDC) has been recently considered a promising learning approach for resource-constrained devices. However, existing approaches use static…

cs.DC2023★ 3 cited

Hector: An Efficient Programming and Compilation Framework for Implementing Relational Graph Neural Networks in GPU Architectures

Kun Wu, Mert Hidayetoğlu, Xiang Song +4

Relational graph neural networks (RGNNs) are graph neural networks with dedicated structures for modeling the different types of nodes and edges in heterogeneous graphs. While RGNN…

cs.DC2022★ 1 cited

Sgap: Towards Efficient Sparse Tensor Algebra Compilation for GPU

Genghan Zhang, Yuetong Zhao, Yanting Tao +6

Sparse compiler is a promising solution for sparse tensor algebra optimization. In compiler implementation, reduction in sparse-dense hybrid algebra plays a key role in performance…

cs.AR2022★ 1 cited

Chimera: A Hybrid Machine Learning Driven Multi-Objective Design Space Exploration Tool for FPGA High-Level Synthesis

Mang Yu, Sitao Huang, Deming Chen

In recent years, hardware accelerators based on field-programmable gate arrays (FPGAs) have been widely adopted, thanks to FPGAs' extraordinary flexibility. However, with the high…

cs.LG2022

Compilation and Optimizations for Efficient Machine Learning on Embedded Systems

Xiaofan Zhang, Yao Chen, Cong Hao +3

Deep Neural Networks (DNNs) have achieved great success in a variety of machine learning (ML) applications, delivering high-quality inferencing solutions in computer vision, natura…

cs.LG2021★ 97 cited

Mind Mappings: Enabling Efficient Algorithm-Accelerator Mapping Space Search

Kartik Hegde, Po-An Tsai, Sitao Huang +3

Modern day computing increasingly relies on specialization to satiate growing performance and efficiency requirements. A core challenge in designing such specialized hardware archi…

cs.LG2021★ 3 cited

Large Graph Convolutional Network Training with GPU-Oriented Data Communication Architecture

Seung Won Min, Kun Wu, Sitao Huang +5

Graph Convolutional Networks (GCNs) are increasingly adopted in large-scale graph-based recommender systems. Training GCN requires the minibatch generator traversing graphs and sam…

cs.LG2021★ 3 cited

PyTorch-Direct: Enabling GPU Centric Data Access for Very Large Graph Neural Network Training with Irregular Accesses

Seung Won Min, Kun Wu, Sitao Huang +5

With the increasing adoption of graph neural networks (GNNs) in the machine learning community, GPUs have become an essential tool to accelerate GNN training. However, training GNN…

cs.AR2019

Analysis and Optimization of I/O Cache Coherency Strategies for SoC-FPGA Device

Seung Won Min, Sitao Huang, Mohamed El-Hadedy +3

Unlike traditional PCIe-based FPGA accelerators, heterogeneous SoC-FPGA devices provide tighter integrations between software running on CPUs and hardware accelerators. Modern hete…

cs.CV2019★ 13 cited

FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edge

Cong Hao, Xiaofan Zhang, Yuhong Li +5

While embedded FPGAs are attractive platforms for DNN acceleration on edge-devices due to their low latency and high energy efficiency, the scarcity of resources of edge-scale FPGA…