8 citations · 9 across the 10 of their papers we have counts for
12 papers
Safe-NEureka: a Hybrid Modular Redundant DNN Accelerator for On-board Satellite AI Processing
Riccardo Tedeschi, Luigi Ghionda, Alessandro Nadalini +5
Low Earth Orbit (LEO) constellations are revolutionizing the space sector, with on-board Artificial Intelligence (AI) becoming pivotal for next-generation satellites. AI accelerati…
A Multi-Modal IoT Node for Energy-Efficient Environmental Monitoring with Edge AI Processing
Philip Wiese, Victor Kartsch, Marco Guermandi +1
The widespread adoption of Internet of Things (IoT) technologies has significantly advanced environmental monitoring (EM) by enabling cost-effective and scalable sensing solutions.…
Improving Chip Design Enablement for Universities in Europe -- A Position Paper
Lukas Krupp, Ian O'Connor, Luca Benini +3
The semiconductor industry is pivotal to Europe's economy, especially within the industrial and automotive sectors. However, Europe faces a significant shortfall in chip design cap…
MXDOTP: A RISC-V ISA Extension for Enabling Microscaling (MX) Floating-Point Dot Products
Gamze İslamoğlu, Luca Bertaccini, Arpan Suravi Prasad +3
Fast and energy-efficient low-bitwidth floating-point (FP) arithmetic is essential for Artificial Intelligence (AI) systems. Microscaling (MX) standardized formats have recently em…
VEXP: A Low-Cost RISC-V ISA Extension for Accelerated Softmax Computation in Transformers
Run Wang, Gamze Islamoglu, Andrea Belano +4
While Transformers are dominated by Floating-Point (FP) Matrix-Multiplications, their aggressive acceleration through dedicated hardware or many-core programmable systems has shift…
Fused-Tiled Layers: Minimizing Data Movement on RISC-V SoCs with Software-Managed Caches
Victor J. B. Jung, Alessio Burrello, Francesco Conti +1
The success of DNNs and their high computational requirements pushed for large codesign efforts aiming at DNN acceleration. Since DNNs can be represented as static computational gr…