1 citations · 1 across the 8 of their papers we have counts for
4 papers · 1 filter
CITADEL: CWE-Guided Insertion of Hardware Trojans via Analysis of DFG-Enabled LLMs
Jayanth Thangellamudi, Raghul Saravanan, Sudipta Paria +2
The increasing sophistication of Hardware Trojans (HTs) and system-level vulnerabilities poses significant risks to modern integrated circuits. However, constructing realistic HT s…
SoK: ARCUS: On the Efficiency and Efficacy of Hardware Fuzzing
Alenkruth Krishnan Murali, Raghul Saravanan, Sai Manoj P D +1
This work presents a comprehensive analysis of contemporary hardware fuzzing techniques applied across three major abstraction layers: Instruction Set Architecture (ISA), microarch…
Lessons from the Hardware Hacking Competitions: Verification Techniques, Findings, and Insights
Sudipta Paria, Aritra Dasgupta, Raghul Saravanan +3
Hardware hacking competitions have emerged as practical platforms for evaluating security weaknesses in complex System-on-Chip (SoC) designs while promoting security-aware verifica…
An Automated Framework for Generating Stealthy Cell-Embedded Hardware Trojans
Raghul Saravanan, Sudipta Paria, Sai Manoj P D +1
Hardware Trojans (HTs) pose significant threats across the Integrated Circuit (IC) design lifecycle because they can be inserted by untrusted entities at different stages under the…