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cs.AR2025★ 1 cited
LUT-LLM: Efficient Large Language Model Inference with Memory-based Computations on FPGAs
Zifan He, Shengyu Ye, Rui Ma +2
The rapid development of large language models (LLM) has greatly enhanced everyday applications. While many FPGA-based accelerators, with flexibility for fine-grained data control,…
cs.AR2025
InTAR: Inter-Task Auto-Reconfigurable Accelerator Design for High Data Volume Variation in DNNs
Zifan He, Anderson Truong, Yingqi Cao +1
The rise of deep neural networks (DNNs) has driven an increased demand for computing power and memory. Modern DNNs exhibit high data volume variation (HDV) across tasks, which pose…
cs.ET2025
Monolithic 3D FPGAs Utilizing Back-End-of-Line Configuration Memories
Faaiq Waqar, Jiahao Zhang, Anni Lu +3
This work presents a novel monolithic 3D (M3D) FPGA architecture that leverages stackable back-end-of-line (BEOL) transistors to implement configuration memory and pass gates, sign…