3 papers
cs.AR2026
FlexLLM: Composable HLS Library for Flexible Hybrid LLM Accelerator Design
Jiahao Zhang, Zifan He, Nicholas Fraser +3
We present FlexLLM, a composable High-Level Synthesis (HLS) library for rapid development of domain-specific LLM accelerators. FlexLLM exposes key architectural degrees of freedom…
cs.AR2025
InTAR: Inter-Task Auto-Reconfigurable Accelerator Design for High Data Volume Variation in DNNs
Zifan He, Anderson Truong, Yingqi Cao +1
The rise of deep neural networks (DNNs) has driven an increased demand for computing power and memory. Modern DNNs exhibit high data volume variation (HDV) across tasks, which pose…
cs.ET2025
Monolithic 3D FPGAs Utilizing Back-End-of-Line Configuration Memories
Faaiq Waqar, Jiahao Zhang, Anni Lu +3
This work presents a novel monolithic 3D (M3D) FPGA architecture that leverages stackable back-end-of-line (BEOL) transistors to implement configuration memory and pass gates, sign…