8 citations · 8 across the 4 of their papers we have counts for
6 papers
Training with Fewer Bits: Unlocking Edge LLMs Training with Stochastic Rounding
Taowen Liu, Marta Andronic, Deniz Gündüz +1
LLM training is resource-intensive. Quantized training improves computational and memory efficiency but introduces quantization noise, which can hinder convergence and degrade mode…
NeuraLUT-Assemble: Hardware-aware Assembling of Sub-Neural Networks for Efficient LUT Inference
Marta Andronic, George A. Constantinides
Efficient neural networks (NNs) leveraging lookup tables (LUTs) have demonstrated significant potential for emerging AI applications, particularly when deployed on field-programmab…
Banked Memories for Soft SIMT Processors
Martin Langhammer, George A. Constantinides
Recent advances in soft GPGPU architectures have shown that a small (<10K LUT), high performance (770 MHz) processor is possible in modern FPGAs. In this paper we architect and eva…
AMPLE: Event-Driven Accelerator for Mixed-Precision Inference of Graph Neural Networks
Pedro Gimenes, Yiren Zhao, George Constantinides
Graph Neural Networks (GNNs) have recently gained attention due to their performance on non-Euclidean data. The use of custom hardware architectures proves particularly beneficial…
PolyLUT: Ultra-low Latency Polynomial Inference with Hardware-Aware Structured Pruning
Marta Andronic, Jiawen Li, George A. Constantinides
Standard deep neural network inference involves the computation of interleaved linear maps and nonlinear activation functions. Prior work for ultra-low latency implementations has…
ReducedLUT: Table Decomposition with "Don't Care" Conditions
Oliver Cassidy, Marta Andronic, Samuel Coward +1
Lookup tables (LUTs) are frequently used to efficiently store arrays of precomputed values for complex mathematical computations. When used in the context of neural networks, these…