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cond-mat.mes-hall2025
Design Optimization of Flip FET Standard Cells with Dual-sided Pins for Ultimate Scaling
Rui Gui, Haoran Lu, Jiacheng Sun +7
Recently, we proposed a novel transistor architecture for 3D stacked FETs called Flip FET (FFET), featuring N/P transistors back-to-back stacked and dual-sided interconnects. With…
cond-mat.mes-hall2025
Overlay-aware Variation Study of Flip FET and Benchmark with CFET
Wanyue Peng, Haoran Lu, Jingru Jiang +5
In this work, we carried out an overlay-aware variation study on Flip FET (FFET) considering the impact on RC parasitics induced by the lithography misalignment in backside process…