14 citations · 27 across the 19 of their papers we have counts for
3 papers · 1 filter
Scalable AXI4 Transaction Monitoring for Mixed-Criticality SoCs: From Phase-Level Precision to ID-Level Efficiency
Chaoqun Liang, Thomas Benz, Alessandro Ottaviano +4
Mixed-criticality Systems-on-Chip (SoCs) with on-chip interconnects based on the AXI4 open standard protocol lack a protocol-level timeout mechanism, exposing systems to deadlocks…
CVA6-RT: an Open-Source Time-Predictable RV64 Processor for Mixed-Criticality Systems
Enrico Zelioli, Christopher Reinwardt, Nils Wistoff +4
This work presents CVA6-RT, a real-time micro-architectural extension of the CVA6 core to bound worst-case latency and reduce task's timing execution variability. CVA6-RT implement…
MATCHA: Efficient Deployment of Deep Neural Networks on Multi-Accelerator Heterogeneous Edge SoCs
Enrico Russo, Mohamed Amine Hamdi, Alessandro Ottaviano +6
Deploying DNNs on System-on-Chips (SoC) with multiple heterogeneous acceleration engines is challenging, and the majority of deployment frameworks cannot fully exploit heterogeneit…