14 citations · 27 across the 19 of their papers we have counts for
7 papers · 1 filter
AXI-REALM: A Lightweight and Modular Interconnect Extension for Traffic Regulation and Monitoring of Heterogeneous Real-Time SoCs
Thomas Benz, Alessandro Ottaviano, Robert Balas +4
The increasing demand for heterogeneous functionality in the automotive industry and the evolution of chip manufacturing processes have led to the transition from federated to inte…
CV32RT: Enabling Fast Interrupt and Context Switching for RISC-V Microcontrollers
Robert Balas, Alessandro Ottaviano, Luca Benini
Processors using the open RISC-V ISA are finding increasing adoption in the embedded world. Many embedded use cases have real-time constraints and require flexible, predictable, an…
PELS: A Lightweight and Flexible Peripheral Event Linking System for Ultra-Low Power IoT Processors
Alessandro Ottaviano, Robert Balas, Philippe Sauter +2
A key challenge for ultra-low-power (ULP) devices is handling peripheral linking, where the main central processing unit (CPU) periodically mediates the interaction among multiple…
Towards a RISC-V Open Platform for Next-generation Automotive ECUs
Luca Cuomo, Claudio Scordino, Alessandro Ottaviano +5
The complexity of automotive systems is increasing quickly due to the integration of novel functionalities such as assisted or autonomous driving. However, increasing complexity po…
ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation
Alessandro Ottaviano, Robert Balas, Giovanni Bambini +5
High-Performance Computing (HPC) processors are nowadays integrated Cyber-Physical Systems demanding complex and high-bandwidth closed-loop power and thermal control strategies. To…
A High-performance, Energy-efficient Modular DMA Engine Architecture
Thomas Benz, Michael Rogenmoser, Paul Scheffler +5
Data transfers are essential in today's computing systems as latency and complex memory access patterns are increasingly challenging to manage. Direct memory access engines (DMAEs)…
Cheshire: A Lightweight, Linux-Capable RISC-V Host Platform for Domain-Specific Accelerator Plug-In
Alessandro Ottaviano, Thomas Benz, Paul Scheffler +1
Power and cost constraints in the internet-of-things (IoT) extreme-edge and TinyML domains, coupled with increasing performance requirements, motivate a trend toward heterogeneous…