1 citations · 3 across the 9 of their papers we have counts for
10 papers
GPU-Accelerated Gate-Level Time-Based Power Analysis via Event-Density-Aware Partitioning and Kernel Fusion
Weihao Wang, Yikang Ouyang, Hongyuan Liu +1
Power analysis is crucial in modern chip design flow. Particularly, time-based power analysis can provide fine-grained power consumption information to facilitate the diagnosis of…
Will Accurate Fields Mislead Photonic Design? FromGlobal Accuracy to Port Readout
Yitian Zhang, Yonghong chen, Youming Chen +6
Neural field surrogates can accelerate photonic design loops, but a surrogate that looks accurate in global field error can still mis-rank candidate devices when the final decision…
Retrieve, Schedule, Reflect: LLM Agents for Chip QoR Optimization
Yikang Ouyang, Yang Luo, Dongsheng Zuo +1
Modern chip design requires multi-objective optimization of timing, power, and area under stringent time-to-market constraints. Although powerful optimization algorithms are integr…
PrefixAgent: An LLM-Powered Design Framework for Efficient Prefix Adder Optimization
Dongsheng Zuo, Jiadong Zhu, Yang Luo +1
Prefix adders are fundamental arithmetic circuits, but their design space grows exponentially with bit-width, posing significant optimization challenges. Previous works face limita…
E-morphic: Scalable Equality Saturation for Structural Exploration in Logic Synthesis
Chen Chen, Guangyu HU, Cunxi Yu +2
In technology mapping, the quality of the final implementation heavily relies on the circuit structure after technology-independent optimization. Recent studies have introduced equ…
A Survey of Circuit Foundation Model: Foundation AI Models for VLSI Circuit Design and EDA
Wenji Fang, Jing Wang, Yao Lu +4
Artificial intelligence (AI)-driven electronic design automation (EDA) techniques have been extensively explored for VLSI circuit design applications. Most recently, foundation AI…
PICBench: Benchmarking LLMs for Photonic Integrated Circuits Design
Yuchao Wu, Xiaofei Yu, Hao Chen +3
While large language models (LLMs) have shown remarkable potential in automating various tasks in digital chip design, the field of Photonic Integrated Circuits (PICs)-a promising…
UFO-MAC: A Unified Framework for Optimization of High-Performance Multipliers and Multiply-Accumulators
Dongsheng Zuo, Jiadong Zhu, Chenglin Li +1
Multipliers and multiply-accumulators (MACs) are critical arithmetic circuit components in the modern era. As essential components of AI accelerators, they significantly influence…
RL-MUL 2.0: Multiplier Design Optimization with Parallel Deep Reinforcement Learning and Space Reduction
Dongsheng Zuo, Jiadong Zhu, Yikang Ouyang +1
Multiplication is a fundamental operation in many applications, and multipliers are widely adopted in various circuits. However, optimizing multipliers is challenging due to the ex…
E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis
Chen Chen, Guangyu Hu, Dongsheng Zuo +3
Logic synthesis plays a crucial role in the digital design flow. It has a decisive influence on the final Quality of Results (QoR) of the circuit implementations. However, existing…