9 citations · 10 across the 5 of their papers we have counts for
5 papers
XTC, A Research Platform for Optimizing AI Workload Operators
Pompougnac Hugo, Guillon Christophe, Noiry Sylvain +3
Achieving high efficiency on AI operators demands precise control over computation and data movement. However, existing scheduling languages are locked into specific compiler ecosy…
A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions
Alexandre Lopoukhine, Federico Ficarelli, Christos Vasiladiotis +6
High-performance micro-kernels must fully exploit today's diverse and specialized hardware to deliver peak performance to DNNs. While higher-level optimizations for DNNs are offere…
Performance Debugging through Microarchitectural Sensitivity and Causality Analysis
Alban Dutilleul, Hugo Pompougnac, Nicolas Derumigny +4
Modern Out-of-Order (OoO) CPUs are complex systems with many components interleaved in non-trivial ways. Pinpointing performance bottlenecks and understanding the underlying causes…
Performance bottlenecks detection through microarchitectural sensitivity
Hugo Pompougnac, Alban Dutilleul, Christophe Guillon +2
Modern Out-of-Order (OoO) CPUs are complex systems with many components interleaved in non-trivial ways. Pinpointing performance bottlenecks and understanding the underlying causes…
CesASMe and Staticdeps: static detection of memory-carried dependencies for code analyzers
Théophile Bastian, Hugo Pompougnac, Alban Dutilleul +1
A variety of code analyzers, such as IACA, uiCA, llvm-mca or Ithemal, strive to statically predict the throughput of a computation kernel. Each analyzer is based on its own simplif…