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cs.AR2024
Revealing Untapped DSP Optimization Potentials for FPGA-Based Systolic Matrix Engines
Jindong Li, Tenglong Li, Guobin Shen +3
Systolic architectures are widely embraced by neural network accelerators for their superior performance in highly parallelized computation. The DSP48E2s serve as dedicated arithme…
cs.AR2024
FireFly-S: Exploiting Dual-Side Sparsity for Spiking Neural Networks Acceleration with Reconfigurable Spatial Architecture
Tenglong Li, Jindong Li, Guobin Shen +3
Spiking Neural Networks (SNNs), with brain-inspired structure using discrete spikes instead of continuous activations, are gaining attention for their efficient processing on neuro…