7 citations · 10 across the 5 of their papers we have counts for
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eess.SP2025
Bridging the Initialization Gap: A Co-Optimization Framework for Mixed-Size Global Placement
Yuhao Ren, Yiting Liu, Yanfei Zhou +4
Global placement is a critical step with high computational complexity in VLSI physical design. Modern analytical placers formulate the placement problem as a nonlinear optimizatio…
eess.SY2025
SMP-RCR: A Sparse Multipoint Moment Matching Method for RC Reduction
Siyuan Yin, Yuncheng Xu, Lin Liu +4
In post--layout circuit simulation, efficient model order reduction (MOR) for many--port resistor--capacitor (RC) circuits remains a crucial issue. The current mainstream MOR metho…
cs.LG2025
The Power of Graph Signal Processing for Chip Placement Acceleration
Yiting Liu, Hai Zhou, Jia Wang +3
Placement is a critical task with high computation complexity in VLSI physical design. Modern analytical placers formulate the placement objective as a nonlinear optimization task,…