2 papers
cs.LG2026
A logical re-conception of neural networks: Hamiltonian bitwise part-whole architecture
E Bowen, R Granger, A Rodriguez
We introduce a simple initial working system in which relations (such as part-whole) are directly represented via an architecture with operating and learning rules fundamentally di…
cs.DC2024
Co-design of a novel CMOS highly parallel, low-power, multi-chip neural network accelerator
W Hokenmaier, R Jurasek, E Bowen +2
Why do security cameras, sensors, and siri use cloud servers instead of on-board computation? The lack of very-low-power, high-performance chips greatly limits the ability to field…