294 citations · 898 across the 16 of their papers we have counts for
16 papers
Assessing the Performance of Analog Training for Transfer Learning
Omobayode Fagbohungbe, Corey Lammie, Malte J. Rasch +3
Analog in-memory computing is a next-generation computing paradigm that promises fast, parallel, and energy-efficient deep learning training and transfer learning (TL). However, ac…
Rapid yet accurate Tile-circuit and device modeling for Analog In-Memory Computing
J. Luquin, C. Mackin, S. Ambrogio +11
Analog In-Memory Compute (AIMC) can improve the energy efficiency of Deep Learning by orders of magnitude. Yet analog-domain device and circuit non-idealities -- within the analog…
Towards Exact Gradient-based Training on Analog In-memory Computing
Zhaoxian Wu, Tayfun Gokmen, Malte J. Rasch +1
Given the high economic and environmental costs of using large vision or language models, analog in-memory accelerators present a promising solution for energy-efficient AI. While…
Multi-Function Multi-Way Analog Technology for Sustainable Machine Intelligence Computation
Vassilis Kalantzis, Mark S. Squillante, Shashanka Ubaru +12
Numerical computation is essential to many areas of artificial intelligence (AI), whose computing demands continue to grow dramatically, yet their continued scaling is jeopardized…
Improving the Accuracy of Analog-Based In-Memory Computing Accelerators Post-Training
Corey Lammie, Athanasios Vasilopoulos, Julian Büchel +4
Analog-Based In-Memory Computing (AIMC) inference accelerators can be used to efficiently execute Deep Neural Network (DNN) inference workloads. However, to mitigate accuracy losse…
Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inference
Manuel Le Gallo, Corey Lammie, Julian Buechel +8
Analog In-Memory Computing (AIMC) is a promising approach to reduce the latency and energy consumption of Deep Neural Network (DNN) inference and training. However, the noisy and n…
AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computing
Hadjer Benmeziane, Corey Lammie, Irem Boybat +9
The advancement of Deep Learning (DL) is driven by efficient Deep Neural Network (DNN) design and new hardware accelerators. Current DNN design is primarily tailored for general-pu…
Fast offset corrected in-memory training
Malte J. Rasch, Fabio Carta, Omebayode Fagbohungbe +1
In-memory computing with resistive crossbar arrays has been suggested to accelerate deep-learning workloads in highly efficient manner. To unleash the full potential of in-memory c…
Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators
Malte J. Rasch, Charles Mackin, Manuel Le Gallo +10
Analog in-memory computing (AIMC) -- a promising approach for energy-efficient acceleration of deep learning workloads -- computes matrix-vector multiplications (MVMs) but only app…
A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference
Manuel Le Gallo, Riduan Khaddam-Aljameh, Milos Stanisavljevic +26
The need to repeatedly shuttle around synaptic weight values from memory to processing units has been a key source of energy inefficiency associated with hardware implementation of…
A flexible and fast PyTorch toolkit for simulating training and inference on analog crossbar arrays
Malte J. Rasch, Diego Moreda, Tayfun Gokmen +6
We introduce the IBM Analog Hardware Acceleration Kit, a new and first of a kind open source toolkit to simulate analog crossbar arrays in a convenient fashion from within PyTorch…
Zero-shifting Technique for Deep Neural Network Training on Resistive Cross-point Arrays
Hyungjun Kim, Malte Rasch, Tayfun Gokmen +5
A resistive memory device-based computing architecture is one of the promising platforms for energy-efficient Deep Neural Network (DNN) training accelerators. The key technical cha…
Training large-scale ANNs on simulated resistive crossbar arrays
Malte J. Rasch, Tayfun Gokmen, Wilfried Haensch
Accelerating training of artificial neural networks (ANN) with analog resistive crossbar arrays is a promising idea. While the concept has been verified on very small ANNs and toy…
Efficient ConvNets for Analog Arrays
Malte J. Rasch, Tayfun Gokmen, Mattia Rigotti +1
Analog arrays are a promising upcoming hardware technology with the potential to drastically speed up deep learning. Their main advantage is that they compute matrix-vector product…
Training LSTM Networks with Resistive Cross-Point Devices
Tayfun Gokmen, Malte Rasch, Wilfried Haensch
In our previous work we have shown that resistive cross point devices, so called Resistive Processing Unit (RPU) devices, can provide significant power and speed benefits when trai…
A Kernel Method for the Two-Sample Problem
Arthur Gretton, Karsten Borgwardt, Malte J. Rasch +2
We propose a framework for analyzing and comparing distributions, allowing us to design statistical tests to determine if two samples are drawn from different distributions. Our te…