24 citations · 74 across the 14 of their papers we have counts for
4 papers · 1 filter
Spatz: Clustering Compact RISC-V-Based Vector Units to Maximize Computing Efficiency
Matteo Perotti, Samuel Riedel, Matheus Cavalcante +1
The ever-increasing computational and storage requirements of modern applications and the slowdown of technology scaling pose major challenges to designing and implementing efficie…
Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster
Marco Bertuletti, Samuel Riedel, Yichao Zhang +2
Synchronization is likely the most critical performance killer in shared-memory parallel programs. With the rise of multi-core and many-core processors, the relative impact on perf…
A High-performance, Energy-efficient Modular DMA Engine Architecture
Thomas Benz, Michael Rogenmoser, Paul Scheffler +5
Data transfers are essential in today's computing systems as latency and complex memory access patterns are increasingly challenging to manage. Direct memory access engines (DMAEs)…
MemPool: A Scalable Manycore Architecture with a Low-Latency Shared L1 Memory
Samuel Riedel, Matheus Cavalcante, Renzo Andri +1
Shared L1 memory clusters are a common architectural pattern (e.g., in GPGPUs) for building efficient and flexible multi-processing-element (PE) engines. However, it is a common be…