2 papers
eess.SP2023
A Read Margin Enhancement Circuit with Dynamic Bias Optimization for MRAM
Renhe Chen, Albert Lee, Zirui Wang +2
This brief introduces a read bias circuit to improve readout yield of magnetic random access memories (MRAMs). A dynamic bias optimization (DBO) circuit is proposed to enable the r…
physics.app-ph2023
The interface states in gate-all-around transistors (GAAFETs)
Yue-Yang Liu, Haoran Lu, Zirui Wang +5
The atomic-level structural detail and the quantum effects are becoming crucial to device performance as the emerging advanced transistors, representatively GAAFETs, are scaling do…