4 citations · 6 across the 3 of their papers we have counts for
3 papers
There and Back Again: A Netlist's Tale with Much Egraphin'
Gus Henry Smith, Zachary D. Sisco, Thanawat Techaumnuaiwit +6
EDA toolchains are notoriously unpredictable, incomplete, and error-prone; the generally-accepted remedy has been to re-imagine EDA tasks as compilation problems. However, any comp…
FPGA Technology Mapping Using Sketch-Guided Program Synthesis
Gus Henry Smith, Ben Kushigian, Vishal Canumalla +6
FPGA technology mapping is the process of implementing a hardware design expressed in high-level HDL (hardware design language) code using the low-level, architecture-specific prim…
Generate Compilers from Hardware Models!
Gus Henry Smith, Ben Kushigian, Vishal Canumalla +3
Compiler backends should be automatically generated from hardware design language (HDL) models of the hardware they target. Generating compiler components directly from HDL can pro…