An Accurate Process Induced Variability Aware Compact Model-based Circuit Performance Estimation for Design-Technology Co-optimization

Shubham Patil, Amita Rawat, Udayan Ganguly

In sub-10nm FinFETs, Line-edge-roughness (LER) and metal-gate granularity (MGG) are the two most dominant sources of variability and are mostly modeled semi-empirically. In this wo…