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20222026
most citedA Multi-Expert Large Language Model Architecture for Verilog Code Generation

25 citations · 36 across the 9 of their papers we have counts for

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2 papers · 1 filter

cs.LG2025

TB or Not TB: Coverage-Driven Direct Preference Optimization for Verilog Stimulus Generation

Bardia Nadimi, Khashayar Filom, Deming Chen +1

With the rapid advancement of Large Language Models (LLMs), there is growing interest in applying them to hardware design and verification. Among these stages, design verification…

cs.AR2025★ 2 cited

VeriMind: Agentic LLM for Automated Verilog Generation with a Novel Evaluation Metric

Bardia Nadimi, Ghali Omar Boutaib, Hao Zheng

Designing Verilog modules requires meticulous attention to correctness, efficiency, and adherence to design specifications. However, manually writing Verilog code remains a complex…