11 citations · 30 across the 8 of their papers we have counts for
3 papers · 1 filter
SecureD: A Secure Dual Core Embedded Processor
Roshan G. Ragel, Jude A. Ambrose, Sri Parameswaran
Security of embedded computing systems is becoming of paramount concern as these devices become more ubiquitous, contain personal information and are increasingly used for financia…
CIPARSim: Cache Intersection Property Assisted Rapid Single-pass FIFO Cache Simulation Technique
Mohammad Shihabul Haque, Jorgen Peddersen, Sri Parameswaran
In this paper, for the first time, we introduce a cache property called the Intersection Property that helps to reduce singlepass simulation time in a manner similar to inclusion p…
DEW: A Fast Level 1 Cache Simulation Approach for Embedded Processors with FIFO Replacement Policy
Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya +1
Increasing the speed of cache simulation to obtain hit/miss rates en- ables performance estimation, cache exploration for embedded sys- tems and energy estimation. Previously, such…