4 citations · 12 across the 10 of their papers we have counts for
6 papers · 1 filter
RowPress Vulnerability in Modern DRAM Chips
Haocong Luo, Ataberk Olgun, A. Giray Yağlıkçı +6
Memory isolation is a critical property for system reliability, security, and safety. We demonstrate RowPress, a DRAM read disturbance phenomenon different from the well-known RowH…
PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips
Ismail Emir Yuksel, Yahya Can Tugrul, F. Nisa Bostanci +8
Data movement between the processor and the main memory is a first-order obstacle against improving performance and energy efficiency in modern systems. To address this obstacle, P…
Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator
Haocong Luo, Yahya Can Tuğrul, F. Nisa Bostancı +3
We present Ramulator 2.0, a highly modular and extensible DRAM simulator that enables rapid and agile implementation and evaluation of design changes in the memory controller and D…
TuRaN: True Random Number Generation Using Supply Voltage Underscaling in SRAMs
İsmail Emir Yüksel, Ataberk Olgun, Behzad Salami +6
Prior works propose SRAM-based TRNGs that extract entropy from SRAM arrays. SRAM arrays are widely used in a majority of specialized or general-purpose chips that perform the compu…
DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM Chips
Ataberk Olgun, Hasan Hassan, A. Giray Yağlıkçı +6
To understand and improve DRAM performance, reliability, security and energy efficiency, prior works study characteristics of commodity DRAM chips. Unfortunately, state-of-the-art…
Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture
Ataberk Olgun, F. Nisa Bostanci, Geraldo F. Oliveira +6
We propose Sectored DRAM, a new, low-overhead DRAM substrate that reduces wasted energy by enabling fine-grained DRAM data transfers and DRAM row activation. Sectored DRAM leverage…