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cs.PL2026
Relational Hoare Logic for High-Level Synthesis of Hardware Accelerators
Izumi Tanaka, Ken Sakayori, Shinya Takamaeda-Yamazaki +1
High-level synthesis (HLS) is a powerful tool for developing efficient hardware accelerators that rely on specialized memory systems to achieve sufficient on-chip data reuse and of…
cs.PL2025
RustSFQ: A Domain-Specific Language for SFQ Circuit Design
Mebuki Oishi, Sun Tanaka, Shinya Takamaeda-Yamazaki
Cell-based design of a single-flux-quantum (SFQ) digital circuit requires input-output consistency; every output signal must be consumed only once by the input of the following com…