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cs.AR2026
VClare: Resolving Imperfect Specifications in LLM-Based Verilog Generation
Zhuorui Zhao, Bing Li, Yu Li +2
Large language models (LLMs) have demonstrated promising capabilities in generating Verilog code from natural language specifications. However, human-written specifications often c…
cs.ET2026
LLM for EDA in Front-End Design: Challenges and Opportunities
Kangwei Xu, Bing Li, Ulf Schlichtmann
As chip complexity increases and time-to-market pressures grow, front-end design has become a critical bottleneck in chip development. Recently, Large Language Models (LLMs) have s…