activity
20222026
most citedMemory Is All You Need: An Overview of Compute-in-Memory Architectures for Accelerating Large Language Model Inference

9 citations · 30 across the 26 of their papers we have counts for

collaborators

26 papers

cs.AR2026

VClare: Resolving Imperfect Specifications in LLM-Based Verilog Generation

Zhuorui Zhao, Bing Li, Yu Li +2

Large language models (LLMs) have demonstrated promising capabilities in generating Verilog code from natural language specifications. However, human-written specifications often c…

cs.ET2026

LLM for EDA in Front-End Design: Challenges and Opportunities

Kangwei Xu, Bing Li, Ulf Schlichtmann

As chip complexity increases and time-to-market pressures grow, front-end design has become a critical bottleneck in chip development. Recently, Large Language Models (LLMs) have s…

cs.AI2025

CorrectHDL: Agentic HDL Design with LLMs Leveraging High-Level Synthesis as Reference

Kangwei Xu, Grace Li Zhang, Ulf Schlichtmann +1

Large Language Models (LLMs) have demonstrated remarkable potential in hardware front-end design using hardware description languages (HDLs). However, their inherent tendency towar…

cs.AR2025

VFocus: Better Verilog Generation from Large Language Model via Focused Reasoning

Zhuorui Zhao, Bing Li, Grace Li Zhang +1

Large Language Models (LLMs) have shown impressive potential in generating Verilog codes, but ensuring functional correctness remains a challenge. Existing approaches often rely on…

eess.SY2025

Large Language Models (LLMs) for Electronic Design Automation (EDA)

Kangwei Xu, Denis Schwachhofer, Jason Blocklove +10

With the growing complexity of modern integrated circuits, hardware engineers are required to devote more effort to the full design-to-manufacturing workflow. This workflow involve…

cs.SE2025★ 1 cited

HLSTester: Efficient Testing of Behavioral Discrepancies with LLMs for High-Level Synthesis

Kangwei Xu, Bing Li, Grace Li Zhang +1

In high-level synthesis (HLS), C/C++ programs with synthesis directives are used to generate circuits for FPGA implementations. However, hardware-specific and platform-dependent ch…

cs.AR2025★ 1 cited

VRank: Enhancing Verilog Code Generation from Large Language Models via Self-Consistency

Zhuorui Zhao, Ruidi Qiu, Ing-Chao Lin +3

Large Language Models (LLMs) have demonstrated promising capabilities in generating Verilog code from module specifications. To improve the quality of such generated Verilog codes,…

cs.PL2025★ 1 cited

Paradigm-Based Automatic HDL Code Generation Using LLMs

Wenhao Sun, Bing Li, Grace Li Zhang +3

While large language models (LLMs) have demonstrated the ability to generate hardware description language (HDL) code for digital circuits, they still face the hallucination proble…

cs.SE2024★ 4 cited

CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Design

Ruidi Qiu, Grace Li Zhang, Rolf Drechsler +2

Functional simulation is an essential step in digital hardware design. Recently, there has been a growing interest in leveraging Large Language Models (LLMs) for hardware testbench…

eess.SY2024★ 1 cited

LLM-Aided Efficient Hardware Design Automation

Kangwei Xu, Ruidi Qiu, Zhuorui Zhao +3

With the rapidly increasing complexity of modern chips, hardware engineers are required to invest more effort in tasks such as circuit design, verification, and physical implementa…

cs.NE2024

An Efficient General-Purpose Optical Accelerator for Neural Networks

Sijie Fei, Amro Eldebiky, Grace Li Zhang +2

General-purpose optical accelerators (GOAs) have emerged as a promising platform to accelerate deep neural networks (DNNs) due to their low latency and energy consumption. Such an…

cs.SE2024★ 3 cited

AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design

Ruidi Qiu, Grace Li Zhang, Rolf Drechsler +2

In digital circuit design, testbenches constitute the cornerstone of simulation-based hardware verification. Traditional methodologies for testbench generation during simulation-ba…

cs.AR2024

Classification-Based Automatic HDL Code Generation Using LLMs

Wenhao Sun, Bing Li, Grace Li Zhang +3

While large language models (LLMs) have demonstrated the ability to generate hardware description language (HDL) code for digital circuits, they still suffer from the hallucination…

eess.SY2024★ 3 cited

Automated C/C++ Program Repair for High-Level Synthesis via Large Language Models

Kangwei Xu, Grace Li Zhang, Xunzhao Yin +3

In High-Level Synthesis (HLS), converting a regular C/C++ program into its HLS-compatible counterpart (HLS-C) still requires tremendous manual effort. Various program scripts have…

eess.SY2024

BasisN: Reprogramming-Free RRAM-Based In-Memory-Computing by Basis Combination for Deep Neural Networks

Amro Eldebiky, Grace Li Zhang, Xunzhao Yin +4

Deep neural networks (DNNs) have made breakthroughs in various fields including image recognition and language processing. DNNs execute hundreds of millions of multiply-and-accumul…

cs.AR2024★ 9 cited

Memory Is All You Need: An Overview of Compute-in-Memory Architectures for Accelerating Large Language Model Inference

Christopher Wolters, Xiaoxuan Yang, Ulf Schlichtmann +1

Large language models (LLMs) have recently transformed natural language processing, enabling machines to generate human-like text and engage in meaningful conversations. This devel…

cs.AI2024★ 1 cited

LiveMind: Low-latency Large Language Models with Simultaneous Inference

Chuangtao Chen, Grace Li Zhang, Xunzhao Yin +3

In this paper, we introduce LiveMind, a novel low-latency inference framework for large language model (LLM) inference which enables LLMs to perform inferences with incomplete user…

cs.AR2024

EncodingNet: A Novel Encoding-based MAC Design for Efficient Neural Network Acceleration

Bo Liu, Grace Li Zhang, Xunzhao Yin +2

Deep neural networks (DNNs) have achieved great breakthroughs in many fields such as image classification and natural language processing. However, the execution of DNNs needs to c…

eess.SY2023★ 2 cited

OplixNet: Towards Area-Efficient Optical Split-Complex Networks with Real-to-Complex Data Assignment and Knowledge Distillation

Ruidi Qiu, Amro Eldebiky, Grace Li Zhang +4

Having the potential for high speed, high throughput, and low energy cost, optical neural networks (ONNs) have emerged as a promising candidate for accelerating deep learning tasks…

cs.LG2023

Computational and Storage Efficient Quadratic Neurons for Deep Neural Networks

Chuangtao Chen, Grace Li Zhang, Xunzhao Yin +3

Deep neural networks (DNNs) have been widely deployed across diverse domains such as computer vision and natural language processing. However, the impressive accomplishments of DNN…

cs.LG2023★ 1 cited

Fused Depthwise Tiling for Memory Optimization in TinyML Deep Neural Network Inference

Rafael Stahl, Daniel Mueller-Gritschneder, Ulf Schlichtmann

Memory optimization for deep neural network (DNN) inference gains high relevance with the emergence of TinyML, which refers to the deployment of DNN inference tasks on tiny, low-po…

cs.NE2023

PowerPruning: Selecting Weights and Activations for Power-Efficient Neural Network Acceleration

Richard Petri, Grace Li Zhang, Yiran Chen +2

Deep neural networks (DNNs) have been successfully applied in various fields. A major challenge of deploying DNNs, especially on edge devices, is power consumption, due to the larg…

cs.NE2022

Biologically Plausible Learning on Neuromorphic Hardware Architectures

Christopher Wolters, Brady Taylor, Edward Hanson +3

With an ever-growing number of parameters defining increasingly complex networks, Deep Learning has led to several breakthroughs surpassing human performance. As a result, data mov…

cs.LG2022

Class-based Quantization for Neural Networks

Wenhao Sun, Grace Li Zhang, Huaxi Gu +2

In deep neural networks (DNNs), there are a huge number of weights and multiply-and-accumulate (MAC) operations. Accordingly, it is challenging to apply DNNs on resource-constraine…