4 papers · 1 filter
A Low-Cost Reliable Racetrack Cache Based on Data Compression
Elham Cheshmikhani, Fateme Shokouhinia, Hamed Farbeh
SRAM-based cache memory faces several scalability limitations in deep nanoscale technologies, e.g., high leakage current, low cell stability, and low density. Emerging Non-Volatile…
An Analytical and Empirical Investigation of Tag Partitioning for Energy-Efficient Reliable Cache
Elham Cheshmikhani, Hamed Farbeh
Associative cache memory significantly influences processor performance and energy consumption. Because it occupies over half of the chip area, cache memory is highly susceptible t…
3RSeT: Read Disturbance Rate Reduction in STT-MRAM Caches by Selective Tag Comparison
Elham Cheshmikhani, Hamed Farbeh, Hossein Asad
Recent development in memory technologies has introduced Spin-Transfer Torque Magnetic RAM (STT-MRAM) as the most promising replacement for SRAMs in on-chip cache memories. Besides…
Modeling and Simulation Frameworks for Processing-in-Memory Architectures
Mahdi Aghaei, Saba Ebrahimi, Mohammad Saleh Arafati +4
Processing-in-Memory (PIM) has emerged as a promising computing paradigm to address the memory wall and the fundamental bottleneck of the von Neumann architecture by reducing costl…