6 citations · 17 across the 7 of their papers we have counts for
7 papers
SwiftRL: Towards Efficient Reinforcement Learning on Real Processing-In-Memory Systems
Kailash Gogineni, Sai Santosh Dayapule, Juan Gómez-Luna +6
Reinforcement Learning (RL) trains agents to learn optimal behavior by maximizing reward signals from experience datasets. However, RL training often faces memory limitations, lead…
Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis
Ismail Emir Yuksel, Yahya Can Tugrul, Ataberk Olgun +7
Processing-using-DRAM (PuD) is an emerging paradigm that leverages the analog operational properties of DRAM circuitry to enable massively parallel in-DRAM computation. PuD has the…
PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips
Ismail Emir Yuksel, Yahya Can Tugrul, F. Nisa Bostanci +8
Data movement between the processor and the main memory is a first-order obstacle against improving performance and energy efficiency in modern systems. To address this obstacle, P…
Accelerating Time Series Analysis via Processing using Non-Volatile Memories
Ivan Fernandez, Christina Giannoula, Aditya Manglik +6
Time Series Analysis (TSA) is a critical workload to extract valuable information from collections of sequential data, e.g., detecting anomalies in electrocardiograms. Subsequence…
Flash-Cosmos: In-Flash Bulk Bitwise Operations Using Inherent Computation Capability of NAND Flash Memory
Jisung Park, Roknoddin Azizi, Geraldo F. Oliveira +6
Bulk bitwise operations, i.e., bitwise operations on large bit vectors, are prevalent in a wide range of important application domains, including databases, graph processing, genom…
Morpheus: Extending the Last Level Cache Capacity in GPU Systems Using Idle GPU Core Resources
Sina Darabi, Mohammad Sadrosadati, Joël Lindegger +6
Graphics Processing Units (GPUs) are widely-used accelerators for data-parallel applications. In many GPU applications, GPU memory bandwidth bottlenecks performance, causing underu…
Towards Efficient Sparse Matrix Vector Multiplication on Real Processing-In-Memory Systems
Christina Giannoula, Ivan Fernandez, Juan Gómez-Luna +3
Several manufacturers have already started to commercialize near-bank Processing-In-Memory (PIM) architectures. Near-bank PIM architectures place simple cores close to DRAM banks a…