1 citations · 5 across the 11 of their papers we have counts for
4 papers · 1 filter
Multiplier Optimization via E-Graph Rewriting
Andy Wanna, Samuel Coward, Theo Drane +2
Multiplier circuits account for significant resource usage in datapath-dominated circuit designs, and RTL designers continue to build bespoke hand-crafted multiplication arrays for…
SEER: Super-Optimization Explorer for HLS using E-graph Rewriting with MLIR
Jianyi Cheng, Samuel Coward, Lorenzo Chelini +2
High-level synthesis (HLS) is a process that automatically translates a software program in a high-level language into a low-level hardware description. However, the hardware desig…
Datapath Verification via Word-Level E-Graph Rewriting
Samuel Coward, Emiliano Morini, Bryan Tan +2
Formal verification of datapath circuits is challenging as they are subject to intense optimization effort in the design phase. Industrial vendors and design companies deploy equiv…
Automating Constraint-Aware Datapath Optimization using E-Graphs
Samuel Coward, George A. Constantinides, Theo Drane
Numerical hardware design requires aggressive optimization, where designers exploit branch constraints, creating optimization opportunities that are valid only on a sub-domain of i…