activity
20222024
most citedAutomatic Datapath Optimization using E-Graphs

1 citations · 5 across the 11 of their papers we have counts for

collaborators

11 papers

cs.AR2024

ROVER: RTL Optimization via Verified E-Graph Rewriting

Samuel Coward, Theo Drane, George A. Constantinides

Manual RTL design and optimization remains prevalent across the semiconductor industry because commercial logic and high-level synthesis tools are unable to match human designs. Ou…

cs.AR2024

On the Systematic Creation of Faithfully Rounded Commutative Truncated Booth Multipliers

Theo Drane, Samuel Coward, Mertcan Temel +1

In many instances of fixed-point multiplication, a full precision result is not required. Instead it is sufficient to return a faithfully rounded result. Faithful rounding permits…

cs.AR2024★ 1 cited

Combining Power and Arithmetic Optimization via Datapath Rewriting

Samuel Coward, Theo Drane, Emiliano Morini +1

Industrial datapath designers consider dynamic power consumption to be a key metric. Arithmetic circuits contribute a major component of total chip power consumption and are theref…

cs.AR2023★ 1 cited

Multiplier Optimization via E-Graph Rewriting

Andy Wanna, Samuel Coward, Theo Drane +2

Multiplier circuits account for significant resource usage in datapath-dominated circuit designs, and RTL designers continue to build bespoke hand-crafted multiplication arrays for…

cs.PL2023

SEER: Super-Optimization Explorer for HLS using E-graph Rewriting with MLIR

Jianyi Cheng, Samuel Coward, Lorenzo Chelini +2

High-level synthesis (HLS) is a process that automatically translates a software program in a high-level language into a low-level hardware description. However, the hardware desig…

cs.LO2023

Datapath Verification via Word-Level E-Graph Rewriting

Samuel Coward, Emiliano Morini, Bryan Tan +2

Formal verification of datapath circuits is challenging as they are subject to intense optimization effort in the design phase. Industrial vendors and design companies deploy equiv…

cs.AR2023★ 1 cited

Automating Constraint-Aware Datapath Optimization using E-Graphs

Samuel Coward, George A. Constantinides, Theo Drane

Numerical hardware design requires aggressive optimization, where designers exploit branch constraints, creating optimization opportunities that are valid only on a sub-domain of i…

cs.AR2022

Automatic Generation of Complete Polynomial Interpolation Hardware Design Space

Bryce Orloski, Samuel Coward, Theo Drane

Hardware implementations of complex functions regularly deploy piecewise polynomial approximations. This work determines the complete design space of piecewise polynomial approxima…

cs.DS2022

Combining E-Graphs with Abstract Interpretation

Samuel Coward, George A. Constantinides, Theo Drane

E-graphs are a data structure that compactly represents equivalent expressions. They are constructed via the repeated application of rewrite rules. Often in practical applications,…

cs.AR2022★ 1 cited

Automatic Datapath Optimization using E-Graphs

Samuel Coward, George A. Constantinides, Theo Drane

Manual optimization of Register Transfer Level (RTL) datapath is commonplace in industry but holds back development as it can be very time consuming. We utilize the fact that a com…

cs.LO2022★ 1 cited

Abstract Interpretation on E-Graphs

Samuel Coward, George A. Constantinides, Theo Drane

Recent e-graph applications have typically considered concrete semantics of expressions, where the notion of equivalence stems from concrete interpretation of expressions. However,…