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20212026
most citedIsadora: Automated Information Flow Property Generation for Hardware Designs

18 citations · 27 across the 8 of their papers we have counts for

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cs.CR2026

SoK: You Find What You Seek: Rethinking Oracles, Guidance, and Input Generation in Hardware Fuzzing

G Abarajithan, Zhenghua Ma, Cristian Tirelli +4

Hardware fuzzing is an active area in security verification research, yet its industrial adoption remains in its early stages. This SoK examines which lessons from software fuzzing…

cs.CR2023★ 2 cited

Information Flow Coverage Metrics for Hardware Security Verification

Andres Meza, Ryan Kastner

Security graphs model attacks, defenses, mitigations, and vulnerabilities on computer networks and systems. With proper attributes, they provide security metrics using standard gra…

cs.CR2023

Pentimento: Data Remanence in Cloud FPGAs

Colin Drewes, Olivia Weng, Andres Meza +4

Cloud FPGAs strike an alluring balance between computational efficiency, energy efficiency, and cost. It is the flexibility of the FPGA architecture that enables these benefits, bu…

cs.CR2021

AKER: A Design and Verification Framework for Safe andSecure SoC Access Control

Francesco Restuccia, Andres Meza, Ryan Kastner

Modern systems on a chip (SoCs) utilize heterogeneous architectures where multiple IP cores have concurrent access to on-chip shared resources. In security-critical applications, I…

cs.CR2021★ 18 cited

Isadora: Automated Information Flow Property Generation for Hardware Designs

Calvin Deutschbein, Andres Meza, Francesco Restuccia +2

Isadora is a methodology for creating information flow specifications of hardware designs. The methodology combines information flow tracking and specification mining to produce a…