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cs.SE2026
Execution-Anchored Hallucination Calibration Reranking for Verilog Code Generation
Guang Yang, Xing Hu, Xiang Chen +2
Large Language Models (LLMs) have demonstrated remarkable capabilities in code generation, yet their performance degrades significantly on low-resource Hardware Description Languag…
cs.SE2026
Semantic Consensus Decoding: Backdoor Defense for Verilog Code Generation
Guang Yang, Xing Hu, Xiang Chen +1
Large language models (LLMs) for Verilog code generation are increasingly adopted in hardware design, yet remain vulnerable to backdoor attacks where adversaries inject malicious t…