1 citations · 1 across the 5 of their papers we have counts for
5 papers
AFarePart: Accuracy-aware Fault-resilient Partitioner for DNN Edge Accelerators
Mukta Debnath, Krishnendu Guha, Debasri Saha +2
Deep Neural Networks (DNNs) are increasingly deployed across distributed and resource-constrained platforms, such as System-on-Chip (SoC) accelerators and edge-cloud systems. DNNs…
Scalable Test Generation to Trigger Rare Targets in High-Level Synthesizable IPs for Cloud FPGAs
Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha +1
High-Level Synthesis (HLS) has transformed the development of complex Hardware IPs (HWIP) by offering abstraction and configurability through languages like SystemC/C++, particular…
AgEncID: Aggregate Encryption Individual Decryption of Key for FPGA Bitstream IP Cores in Cloud
Mukta Debnath, Krishnendu Guha, Debasri Saha +1
Cloud computing platforms are progressively adopting Field Programmable Gate Arrays to deploy specialized hardware accelerators for specific computational tasks. However, the secur…
GreyConE: Greybox fuzzing+Concolic execution guided test generation for high level design
Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha +1
Exhaustive testing of high-level designs pose an arduous challenge due to complex branching conditions, loop structures and inherent concurrency of hardware designs. Test engineers…
FuCE: Fuzzing+Concolic Execution guided Trojan Detection in Synthesizable Hardware Designs
Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha +1
High-level synthesis (HLS) is the next emerging trend for designing complex customized architectures for applications such as Machine Learning, Video Processing. It provides a high…