19 citations · 29 across the 12 of their papers we have counts for
6 papers · 1 filter
RTL-Breaker: Assessing the Security of LLMs against Backdoor Attacks on HDL Code Generation
Lakshmi Likhitha Mankali, Jitendra Bhandari, Manaar Alam +4
Large language models (LLMs) have demonstrated remarkable potential with code generation/completion tasks for hardware design. In fact, LLM-based hardware description language (HDL…
Masala-CHAI: A Large-Scale SPICE Netlist Dataset for Analog Circuits by Harnessing AI
Jitendra Bhandari, Vineet Bhat, Yuheng He +3
Masala-CHAI is a fully automated framework leveraging large language models (LLMs) to generate Simulation Programs with Integrated Circuit Emphasis (SPICE) netlists. It addresses a…
SENTAUR: Security EnhaNced Trojan Assessment Using LLMs Against Undesirable Revisions
Jitendra Bhandari, Rajat Sadhukhan, Prashanth Krishnamurthy +2
A globally distributed IC supply chain brings risks due to untrusted third parties. The risks span inadvertent use of hardware Trojan (HT), inserted Intellectual Property (3P-IP) o…
ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search
Jitendra Bhandari, Animesh Basak Chowdhury, Mohammed Nabeel +4
Power side-channel (PSC) analysis is pivotal for securing cryptographic hardware. Prior art focused on securing gate-level netlists obtained as-is from chip design automation, negl…
LLM-Aided Testbench Generation and Bug Detection for Finite-State Machines
Jitendra Bhandari, Johann Knechtel, Ramesh Narayanaswamy +2
This work investigates the potential of tailoring Large Language Models (LLMs), specifically GPT3.5 and GPT4, for the domain of chip testing. A key aspect of chip design is functio…
Lightweight Countermeasures Against Static Power Side-Channel Attacks
Jitendra Bhandari, Mohammed Nabeel, Likhitha Mankali +3
This paper presents a novel defense strategy against static power side-channel attacks (PSCAs), a critical threat to cryptographic security. Our method is based on (1) carefully tu…