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20162026
most citedTriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA

37 citations · 86 across the 16 of their papers we have counts for

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Showing 2023 · cs.DCShow all

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cs.DC2023

CELLO: Co-designing Schedule and Hybrid Implicit/Explicit Buffer for Complex Tensor Reuse

Raveesh Garg, Michael Pellauer, Sivasankaran Rajamanickam +1

Tensor algebra accelerators have been gaining popularity for running high-performance computing (HPC) workloads. Identifying optimal schedules for individual tensor operations and…