4 citations · 4 across the 2 of their papers we have counts for
2 papers
cs.AR2021★ 4 cited
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm
Sung Kim, Morteza Fayazi, Alhad Daftardar +10
We present Versa, an energy-efficient processor with 36 systolic ARM Cortex-M4F cores and a runtime-reconfigurable memory hierarchy. Versa exploits algorithm-specific characteristi…
cs.AR2021
CoDR: Computation and Data Reuse Aware CNN Accelerator
Alireza Khadem, Haojie Ye, Trevor Mudge
Computation and Data Reuse is critical for the resource-limited Convolutional Neural Network (CNN) accelerators. This paper presents Universal Computation Reuse to exploit weight s…