most citedA Multi-Layer SEU Mitigation Strategy to Improve FPGA Design Robustness for the ATLAS Muon Spectrometer Upgrade

9 citations · 15 across the 2 of their papers we have counts for

collaborators

2 papers

physics.ins-det2020★ 6 cited

Design of a Time-to-Digital Converter ASIC and a mini-DAQ system for the Phase-2 Upgrade of the ATLAS Monitored Drift Tube detector

Yuxiang Guo, Jinhong Wang, Yu Liang +9

We present the second prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for High-Luminosity LHC operations. Compared to the…

physics.ins-det2019★ 9 cited

A Multi-Layer SEU Mitigation Strategy to Improve FPGA Design Robustness for the ATLAS Muon Spectrometer Upgrade

Xueye Hu, Jinhong Wang, Reid Pinkham +3

We present a multi-layer single-event upset mitigation strategy implemented in a low-cost Xilinx Artix-7 FPGA. The implementation is targeted for a trigger data router for the ATLA…