activity
20132026
most citedFPGA Implementation of a Fixed Latency Scheme in a Signal Packet Router for the Upgrade of ATLAS Forward Muon Trigger Electronics

21 citations · 66 across the 9 of their papers we have counts for

collaborators

9 papers

physics.ins-det2026

High-Speed Semi-FE Readout Module for ATLAS MDT at HL-LHC: Design and Production-Level Characterization

Yao Teng, Xueye Hu, Yuxiang Guo +5

The High-Luminosity upgrade of the Large Hadron Collider (HL-LHC) introduces increased demands on the ATLAS Muon Spectrometer, particularly in terms of data throughput, timing dist…

physics.ins-det2024★ 5 cited

The Clock Distribution System for the ATLAS Liquid Argon Calorimeter Phase-I Upgrade Demonstrator

Binwei Deng, Hucheng Chen, Kai Chen +14

A prototype Liquid-argon Trigger Digitizer Board (LTDB), called the LTDB Demonstrator, has been developed to demonstrate the functions of the ATLAS Liquid Argon Calorimeter Phase-I…

physics.ins-det2022

Development and test of a mini-Data Acquisition system for the High-Luminosity LHC upgrade of the ATLAS Monitored Drift Tube detector

Yuxiang Guo, Xueye Hu, Thomas Schwarz +2

New front-end electronics including ASICs and FPGA boards are under development for the ATLAS Monitored Drift Tube (MDT) detector to handle the large data rates and harsh environme…

physics.ins-det2020★ 6 cited

Design of a Time-to-Digital Converter ASIC and a mini-DAQ system for the Phase-2 Upgrade of the ATLAS Monitored Drift Tube detector

Yuxiang Guo, Jinhong Wang, Yu Liang +9

We present the second prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for High-Luminosity LHC operations. Compared to the…

physics.ins-det2019★ 9 cited

A Multi-Layer SEU Mitigation Strategy to Improve FPGA Design Robustness for the ATLAS Muon Spectrometer Upgrade

Xueye Hu, Jinhong Wang, Reid Pinkham +3

We present a multi-layer single-event upset mitigation strategy implemented in a low-cost Xilinx Artix-7 FPGA. The implementation is targeted for a trigger data router for the ATLA…

physics.ins-det2015★ 21 cited

FPGA Implementation of a Fixed Latency Scheme in a Signal Packet Router for the Upgrade of ATLAS Forward Muon Trigger Electronics

Jinhong Wang, Xueye Hu, Thomas Schwarz +4

We propose a new fixed latency scheme for Xilinx gigabit transceivers that will be used in the upgrade of the ATLAS forward muon spectrometer at the Large Hadron Collider. The fixe…

physics.ins-det2014★ 15 cited

Evaluation of commercial ADC radiation tolerance for accelerator experiments

Kai Chen, Hucheng Chen, James Kierstead +7

Electronic components used in high energy physics experiments are subjected to a radiation background composed of high energy hadrons, mesons and photons. These particles can induc…

physics.ins-det2014

Development of COTS ADC SEE Test System for the ATLAS LAr Calorimeter Upgrade

Xueye Hu, Hucheng Chen, Kai Chen +3

Radiation-tolerant, high speed, high density and low power commercial off-the-shelf (COTS) analog-to-digital converters (ADCs) are planned to be used in the upgrade to the Liquid A…

physics.ins-det2013★ 10 cited

A Fast Improved Fat Tree Encoder for Wave Union TDC in an FPGA

Qi Shen, Lei Zhao, Shubin Liu +5

Up to the present, the wave union method can achieve the best timing performance in FPGA based TDC designs. However, it should be guaranteed in such a structure that the non-thermo…